🚀 See you at the OCP EMEA Summit in Dublin! Don't miss the panel discussion: "The RISC Paradigm Shift: Open Hardware Advancements and the Path to Sustainable Digitalization". 🗓️Wed, April 30, 14:00 - 14:30 🔗 2025ocpemea.fnvirtual.app/a/schedule/

🌍 The RISC-V in Space Workshop by European Space Agency & RISC-V International brought together experts and innovators to explore the future of #RISCV in space applications. Flo (#OpenHW) presented "How we accidentally ended up in Space". Watch the recording: hubs.la/Q03kplCw0

🎙️The Open Compute Project EMEA Summit in Dublin has concluded. Thanks to all who attended the panel discussion "The RISC-V Paradigm Shift: Open Hardware Advancements and the Path to Sustainable Digitalization".

A great first day at #RISCVSummitEurope , thanks to everyone who came to the #HPC #SIG meeting this morning. It was a busy session discussing our activities and gaining feedback and views on recommendations from the gap analysis that has been conducted.

That’s a wrap on today’s RISC-V Tutorials and TWGs/SIGs Meetings at #RISCVSummitEurope! 🤝 The sessions were filled with energy, collaboration, and a shared passion for learning, marking the start of an exciting week ahead. See you tomorrow for Day 1 of the main event!

Andrea Gallo, CEO of RISC-V International kicks off #RISCVSummitEurope , great to see #HPC mentioned and some of the activities in Europe highlighted, along with the #riscv ecosystem labs programme that EPCC is member of with our #HPC testbed

🗼BSC in Paris: Our team is all set at booth 27 to welcome you to the #RISCVSummitEurope in Paris! 💻 Come see our Mondragón motherboard for ASIC testing and a fresh demo of the EPI accelerator—same hardware, new object recognition use case.

"The State of the Union is Strong!" SiFive Chief Architect Krste Asanovic is diving into RISC-V’s growing adoption across the computing spectrum, from embedded systems to AI. He will also discuss new developments in the RISC-V ISA, including security extensions and matrix

🤔 Think you’ve seen the EPI accelerator? Think again. 🫸🏻Come visit us at booth 27 at the #RISCVSummitEurope. 💻 We're showcasing the eprocessor accelerator in action—this time with a brand-new object recognition use case. Stop by to see it live!

With over 20 years of experience in open source software and hardware, Scaleway’s Fabien Piuzzi brings deep expertise in Linux servers, embedded systems, energy efficiency, and RISC-V. 🎤 Don’t miss his talk at #RISCVSummitEurope, starting at 10 a.m., where he’ll dive into: 🔹

Day 2 at #RISCVSummitEurope and it's posters all day long! Manolis Marazakis showcasing the HIGHER project with METASAT Project coordinator Leonidas Kosmidis from BSC-CNS Also catch BSC-CNS (booth 27, level S2) & Semidynamics (booth 14, S1)

RISER poster on display today | Day 2 of #RISCVSummitEurope. Manolis Marazakis here with Etienne Walter, from the European Processor Initiative (EPI) EU processor. Also, why not swing by BSC-CNS (booth 27, level S2) & Semidynamics (booth 14, S1)

🔍 Latest on the RISER Project blog: “The Intersection of Open Hardware and European Data Sovereignty.” Open hardware is fast emerging as a key pillar for ensuring transparency, trust, and sovereignty in technology development. 🔗 riser-project.eu/the-intersecti…

🎥 From member keynotes to insightful panel sessions with RISC-V leaders and pioneers, all #RISCVSummitEurope sessions are now available on RISC-V International’s YouTube channel! Missed a few? Now’s your chance to catch up: hubs.la/Q03pM2bn0 📷 Event photos are also live

Join us for the Open Compute Project EMEA Community Monthly Call, w/ presentations from Manolis Marazakis (ICS_FORTH) and Karl Rabe (Co-Lead OCP MDC Group) & founder of Wooden Data Center. 🗓️Online: 16:00-17:00, Tue, 10 Jun. More info: higher-project.eu/open-compute-p…

👋First up in our "Meet the Consortium" series is our coordinating partner ICS_FORTH. Learn about one of Europe's leading research centres and their various roles in the HIGHER project here: 🔗 higher-project.eu/meet-our-conso…

🤔Is this the most complex processor ever conceived in Europe? Learn how SiPearl’s Rhea1 Tape-Out Advances European Sovereignty and Supports HIGHER Project Goals in this post: higher-project.eu/sipearls-rhea1…

🚗 NEXT WEEK at #RISCVSummit North America: Winning the Future of RISC-V Automotive MCU Through Ecosystem Collaboration and Open Standards For Infineon Technologies — one of the world’s largest automotive semiconductor suppliers — the future of automotive is based on RISC-V.

RISE SICS and 2CRSi made an impact at this year's OCP Global Summit, during their session "An Overview and Update of the EU AI Factories Initiative" incl. HIGHER introduction. #OCPSummit25 📽️Find out how to watch the presentation at tinyurl.com/4f3t4xb3

🚀 We are advancing modular, secure & energy-efficient European server design integrating SiPearl's Host Processor Modules (HPMs) within OCPs DC-MHS standard to power next-gen AI & HPC infrastructure. 🔗 Read more: tinyurl.com/23xyknuc