
SPIRS Project
@spirsproject
SPIRS will provide unique existing solutions covering all levels of trust from silicon up to application levels.
H2020-EU.2.1.1 Grant Agreement ID: 952622
ID: 1450048425270067202
https://www.spirs-project.eu/ 18-10-2021 10:37:59
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Attending RISC-V International Summit Europe this year? Join our side event "CROSSCON & (Secure) Friends" to know about the latest advances in RISC-V security from the EU-funded projects CROSSCON Project, ORSHIN Horizon Europe Project (101070008), REWIRE Project, SPIRS Project, SecOPERA Project, and more!🤝🔒 crosscon.eu/events/crossco…


📢 Up next at the CROSSCON @RISC_V Summit side event: "SPIRS Overall Vision" by Piedad Brox, SPIRS Project. Don't miss it! #RISCV


🎙️ Second talk of the day from the SPIRS Project! Join us now for "Root-of-Trust and TEE for a RISC-V core" by Macarena Martinez-Rodriguez and Nicola Tuveri. Starting now at the CROSSCON RISC-V International Summit Side Event! #RISCV



Glad to announce a new publication of Instituto de Microelectrónica de Sevilla Team (#SánchezSolano #RojasMuñoz Macarena Martínez Piedad Brox Jiménez ) at #SPIRS doi.org/10.3390/s24175…




#PauOrtega as part of Instituto de Microelectrónica de Sevilla team has presented today the results of the PUF in the preliminary lightweight RoT ASIC at #NORCAS2024








SPIRS Project Two fantastic demos by our team from Instituto de Microelectrónica de Sevilla 👏👏👏 EdDSA25519 with hardware countermeasures presented by Pablo and supervised by Eros Camacho ASIC2 lightweight Root-of-Trust with a Physical Unclonable Function presented by Pau Ortega and supervised by Macarena Martínez


SPIRS Project Super-proud of the SPIRS Project team under my coordination! Well done 👏👏👏 Thanks to the CSIC #API_VRI delegation at Brussels CSIC Bruselas for local support 🇧🇪🇪🇺 @Europeos_CSIC Instituto de Microelectrónica de Sevilla