We are excited to introduce MosaicSim, a lightweight, modular heterogeneous system simulator, at ISPASS 2020! Check it out below to learn more about early-stage explorations of SoCs and HW-SW co-design leveraging #LLVM IR and #ESP accelerator designs: cs.princeton.edu/~amanocha/file…

Our tool is also open source! github.com/PrincetonUnive… With Davide Giri Marcelo Orenes-Vera Tyler Sorensen Juan Luis Aragón Margaret Martonosi Martonosi Research at Princeton Columbia SLD Group

“RealityCheck: Bringing Modularity, Hierarchy, and Abstraction to Automated Microarchitectural Memory Consistency Verification” (@YManerkar, Daniel Lustig, @MargMartonosi; 2020) 📄 arxiv.org/pdf/2003.04892… #MemoryConsistency #RISCV #WeakMemoryOrdering #TotalScoreOrdering

um.es/web/informatic… Proud of these Fiumers from FIUM, who won the international instruction prefetching contest!

Today I realized the CISC vs RISC dilemma also applies to natural languages. My wife got "Suklaapiparkakku", which is the Finnish for "Galletas de jengibre con chocolate" in Spanish. WDYT is best?

February issue of NSF CISE newsletter: Please read, retweet and subscribe! content.govdelivery.com/accounts/USNSF…

👨‍💻Check out AutoSVA, an interesting tool by Marcelo Vera that can automatically generate formal test benches. github.com/PrincetonUnive… youtube.com/watch?v=Gb5wT1…

State-of-the-art #deeplearning should be simple and accessible to every #ML practitioner. That’s why the CS-2 provides cluster-scale performance with the programming ease of a single machine. Read Deep Learning – Programming at Scale to learn more cerebras.net/resources/deep…

Look who’s on the cover of IEEE Spectrum’s July issue! Read more about supersize AI powered by our record breaking 2.6 transistor Wafer Scale Engine #AICompute #AIResearch #Innovation spectrum.ieee.org/tech-talk/semi…

Today we introduced the world’s first brain-scale #AI solution at Hot Chips 2021, enabling a single CS-2 to support 120 trillion parameter models. We continue to push the boundaries of what’s possible in AI & unlock extreme-scale model potential! bit.ly/3koNc5q

I'm excited to be presenting at the 1st Open-Source Computer Architecture Research (OSCAR) workshop this saturday in NYC (co-located with ISCA) Where are presenting AutoSVA (github.com/PrincetonUnive…) at the verification session. Full program at oscar-workshop.github.io/Program.html

The official program of OSCAR 2022, the new workshop on open-source hardware, is out! Check it out at oscar-workshop.github.io/Program.html #OpenSourceHW #ISCA2022

I'm excited to be presenting this Wednesday at ISCA'22 our work on "Designing and realizing scalable latency tolerance for manycore SoCs" (open access dl.acm.org/doi/abs/10.114…) Thanks to my collaborators Juan Luis Aragón Jonathan Balkind Aninda Manocha David Wentzlaff Margaret Martonosi

🚨🚨MRM group member Marcelo Orenes-Vera won the Student Research Competition at MICRO 2024 this week for his work: Scalable Distributed-data Architecture for Memory-bound Applications 🚨🚨 - Congrats Marcelo!! 🎉🎉

MICRO'23 PhD Forum (lnkd.in/euNBVGNg) was successfully held on Monday! Here's a talk by Marcelo Orenes Vera (PhD candidate at Princeton). Marcelo is currently on the job market for academia. Please contact him if your school is hiring! youtube.com/watch?v=a0gwbM…

Reporting from MICRO in Toronto, here is the talk on "AutoCC: Automatic Discovery of Covert Channels in Time-Shared Hardware" with Marcelo Marcelo Orenes-Vera and our Nils Nils Wistoff during the poster session. Check out the repo github.com/morenes/AutoCC and the paper: parallel.princeton.edu/papers/micro23…