Have you already checked out our Banshee? Samuel just recently presented "Banshee: A Fast LLVM-Based RISC-V Binary Translator" in his ICCAD2021 talk: Github: github.com/pulp-platform/… Slides: pulp-platform.org/docs/Banshee_I…

We are sharing a couple of our Christmas cookies🍪🎄. These are actually our Minpool dies that just came back from manufacturing. asic.ethz.ch/2021/Minpool.h…. With several ‘min’pools maybe we can make a maxpool, or even a terapool. Now that is an idea.

Yesterday we concluded the first EFCL-sponsored project with Samuel's Samuel talk "MemPool Meets Systolic", the best of the systolic & shared-memory combined to create a flexible and fast hybrid architecture. Check out the slides: pulp-platform.org/docs/MmS_EFCL2… efcl.ethz.ch

Samuel's Samuel paper on MemPool, our scalable, shared-L1-memory manycore RISC-V system with 256 RV32IMAXpulpimg Snitch cores is now online. arxiv.org/pdf/2303.17742… @suehtamacv

Samuel's Samuel poster MemPool meets Systolic from #DATE2023 is now online, as well. Take a look: pulp-platform.org/docs/date2023/…

In order to put to rest incorrect information that recently appeared on social media and several more prominent websites, we have published a summary of our project Occamy: pulp-platform.org/occamy/

Time for 🌊"Diving into MemPool: Scaling the Shared-Memory Cluster to 256 Cores" with Samuel Samuel at PULP get-together in Lugano 😀. Check out the slides from his talk: pulp-platform.org/docs/lugano202…

Check out Samuel's "LRSCwait: Enabling Scalable and Efficient Synchronization in Manycore Systems through Polling-Free and Retry-Free Operation" which proposes LRwait & Mwait synchronization primitives + their implementation Colibri with 6.5×throughput: arxiv.org/pdf/2401.09359…

Just in time for Valentine’s Day, here comes the first PULP chip of the year: Heartstream in GF12. An implementation of our MemPool architecture with 64 RISC-V cores. Supported by GlobalFoundries UPP asic.ethz.ch/2024/Heartstre…

Our new paper aiming at efficient systolic execution on shared L1-memory manycore clusters is now on arXiv. Demonstrated on MemPool, check out "Enabling Efficient Hybrid Systolic Computation in Shared L1-Memory Manycore Clusters" Sergio Mazzola Samuel arxiv.org/pdf/2402.12986…

More from #DATE2024 in Valencia😀. Here is our Samuel Samuel during the PhD Forum presenting a poster about his thesis. The poster "Designing and Scaling Versatile Manycore Systems" focuses on MemPool & extensions for synchronization and emulation pulp-platform.org/docs/date2024/….

Samuel Samuel presented LRSCwait where we introduce new atomic operations to eliminate polling and retries during synchronization in manycore systems: arxiv.org/abs/2401.09359 pulp-platform.org/docs/date2024/… Big thank you to Samuel for doing such an amazing job reporting from #DATE2024.

While Charlie the bear was busy in Zurich, our #DATE2024 team enjoyed one last 🌞😎 day with El Oso Valenciano 🧸🇪🇸 Samuel Luca Colagrande Cristian Cioflan Thomas Benz.

Here we come with Heartstream and Charlie The Bear in full beauty: How to tape-out a 64-core RISC-V SoC in under 60 days pulp-platform.org/docs/riscvmuni… Paper: pulp-platform.org/docs/riscvmuni… Sergio Mazzola Yichao, Zhang Samuel Marco Bertuletti just presented at #RISCV Summit in Munich.

Thank you so much to the whole PULP Platform group and everyone else for supporting me over the past years and for celebrating this moment with me! 🙌

Great joy at IIS! Our Heartstream 🤎 chip in GF12 with 64 cores, floating point support & systolic extension says "Hello" after Marco Bertuletti, Samuel Samuel and Yichao Yichao, Zhang, got the Serial Link, JTAG, and UART running. Cheers to that! asic.ethz.ch/2024/Heartstre… Sergio Mazzola