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My latest project: booting full Linux on an intel 4004 from 1971 for fun, art, and no profit: dmitry.gr/?r=05.Projects… #4004in2024

Always a good day when you get to break out your std cell library databook 🥰 Unfortunately it's turbo illegal to share screencaps

Over 200 MiB of cache. If yall weren't so bad at programming we wouldn't even need SDRAM

Introducing a SKY130 ROM compiler project I've been working on for a while. youtu.be/MlqDm_Kg0u8 This is just a quick intro to the project with following episodes diving into all the tech details of the design.

This is a very cool project! The generated code is a bit funky but self-hosted compilation on a microcontroller is always cool, and seeing it running on Hazard3 is a nice bonus for me. ulisp.com/show?4Y20

The SRAM placement somehow has the same energy as this optimal packing of 17 squares inside a square

The unstable branch of Hazard3 now has support for the Zilsd and Zclsd extensions, which improve code density by a further 3% over Zce. Merry Christmas, and thank you to the spec maintainers for merging my change to make it easier to implement! github.com/Wren6991/Hazar…

Listen to us ramble about chips for an hour and a half! I had a ton of fun

Better than "for sale: baby shoes, never worn"

if you are a large company preferably in infra: please vibe code on your embedded devices. ship the vibes. i would love to reverse engineer it and write that my justification for finding a bug is "i put myself in the devs shoes and felt a sort of vibe"

Bitbanging MIPI-CSI2 (currently just a blue frame..) from a Raspberry Pico2 using it's HSTX peripheral. Per lane Datarate is 300Mbps. The frame is received on a PI4 and displayed on HDMI .

Always get a bench PSU and do a soft start on the power rails when bringing up a new pope for the first time